The Top 10 Supercomputers, Illustrated, Nov. 2011 » Data Center Knowledge.
The twice-a-year list of the Top 500 supercomputers documents the most powerful systems on the planet. Many of these supercomputers are striking not just for their processing power, but for their design and appearance as well. Here’s a look at the top finishers in the latest Top 500 list, which was released Monday, November 15, 2011 at the SC11 conference in Seattle.
Super computer porn.
Symmetric multiprocessing – Wikipedia, the free encyclopedia.
In computing, symmetric multiprocessing (SMP) involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are controlled by a single OS instance. Most common multiprocessor systems today use an SMP architecture. In the case of multi-core processors, the SMP architecture applies to the cores, treating them as separate processors. Processors may be interconnected using buses, crossbar switches or on-chip mesh networks. The bottleneck in the scalability of SMP using buses or crossbar switches is the bandwidth and power consumption of the interconnect among the various processors, the memory, and the disk arrays. Mesh architectures avoid these bottlenecks, and provide nearly linear scalability to much higher processor counts at the sacrifice of programmability:
The idea of replacing hard disk drives with flash memory has been gaining steam in the IT industry. But a research group at Stanford University is going even further: they say the goal should be to replace hard disks with DRAM.
via Can DRAM replace hard drives and SSDs? RAMCloud creators say yes.
This seems to violate the KISS principle. The comments in the above article are also interesting. RAM disks have been around since early DOS days.
And while HP was not in a mood to talk specifics, Santeler said that Moonshot would include super-dense servers based on Intel low-power Xeon and Atom chips and Advanced Micro Devices low-power x86 processors as well as multiple suppliers of ARM-based server chips
via HP Project Moonshot hurls ARM servers into the heavens • The Register.
Computer cluster – Wikipedia, the free encyclopedia.
A computer cluster is a group of linked computers, working together closely thus in many respects forming a single computer. The components of a cluster are commonly, but not always, connected to each other through fast local area networks. Clusters are usually deployed to improve performance and availability over that of a single computer, while typically being much more cost-effective than single computers of comparable speed or availability.[1]
And now I will put together clusters for high availability and load balancing. This is where VMs come in handy. I think I prefer loosely coupled clusters, clusters where individual nodes are separated on different power grids.
It’s always nice to have a succinct definition handy to stay focused.
Question: Intel’s Sandy Bridge launch just brought its desktop CPU line up to 3.8GHz, but I remember that the Pentium 4 got up to 3.8GHz before being cancelled. So why is it that Sandy Bridge is just now getting to the clock speed levels that the Pentium 4 was at years ago? And how is it that Sandy Bridge still manages to outperform the older Pentium 4, even though it has a lower clock speed?
via Ask Ars: what’s the relationship between CPU clockspeed and performance?.
Worth a read.
For those who are still members of the Sparc/Solaris installed base—those who haven’t headed for x86 or Itanium already—the T4 is potentially good news. It provides a way to preserve investments in existing Solaris skills and software while getting a significant performance boost over the year-old T3. The T4 will likely stop some defections, buy Oracle time as it prepares its next generation of processor, and reduce the company’s dependence on reselling Fujitsu SPARC 64 systems to run its own database.
via SPARC T4 looks to be good enough to stave off defections to x86, Linux.
When completed, Stampede will comprise several thousand Dell “Zeus” servers with each server having dual 8-core processors from the forthcoming Intel® Xeon® Processor E5 Family (formerly codenamed “Sandy Bridge-EP”) and each server with 32 gigabytes of memory. This production system will offer almost 2 petaflops of peak performance, which is double the current top system in XD, and the real performance of scientific applications will see an even greater performance boost due to the newer processor and interconnect technologies. The cluster will also include a new innovative capability: Intel® Many Integrated Core (MIC) co-processors codenamed “Knights Corner,” providing an additional 8 petaflops of performance. Intel MIC co-processors are designed to process highly parallel workloads and provide the benefits of using the most popular x86 instruction set. This will greatly simplify the task of porting and optimizing applications on Stampede to utilize the performance of both the Intel Xeon processors and Intel MIC co-processors.
Although quantum computing is now mostly a research subject, it holds out the promise of computers far more capable than those we use today. The power of quantum computers comes from their version of the most basic unit of computing, the bit. In a conventional computer, a bit can represent either 1 or 0 at any time. Thanks to the quirks of quantum mechanics, the equivalent in a quantum computer, a qubit, can represent both values at once. When qubits in such a “superposition” state work together, they can operate on exponentially more data than the same number of regular bits. As a result, quantum computers should be able to defeat encryption that is unbreakable in practice today and perform highly complex simulations.
via Quantum Processor Hooks Up with Quantum Memory – Technology Review.
Reading this makes my head want to explode.
This article describes five classes of fabric architectures based on how they use management, control and data (forwarding) plane. Throughout the article we’ll use the generic term switch to describe a forwarding device that can forward either Ethernet frames (layer 2 switch) or IP datagrams (layer 3 switch).
via Data Center Fabric Architectures – Internetworking Expert Hints.