As market data enters the switch, the Ethernet frame is parsed serially as bits arrive, allowing partial information to be extracted and matched before the whole frame has been received.

Then, instead of waiting until the end of a potential triggering input packet, pre-emption is used to start sending the overhead part of a response which contains the Ethernet, IP, TCP and FIX headers. This allows completion of an outgoing order almost immediately after the end of the triggering market feed packet.

The overall effect is a dramatic reduction in latency to close to the minimum that is theoretically possible.

via Groundbreaking Results for High Performance Trading with FPGA and x86 Technologies | Low-Latency.com.