{"id":1652,"date":"2011-11-09T00:34:25","date_gmt":"2011-11-09T06:34:25","guid":{"rendered":"http:\/\/bucktownbell.com\/?p=1652"},"modified":"2011-11-09T00:35:19","modified_gmt":"2011-11-09T06:35:19","slug":"symmetric-multiprocessing-wikipedia-the-free-encyclopedia","status":"publish","type":"post","link":"http:\/\/bucktownbell.com\/?p=1652","title":{"rendered":"Symmetric multiprocessing"},"content":{"rendered":"<p><a href=\"http:\/\/en.wikipedia.org\/wiki\/Symmetric_multiprocessing\">Symmetric multiprocessing &#8211; Wikipedia, the free encyclopedia<\/a>.<\/p>\n<p>In <a title=\"Computing\" href=\"http:\/\/en.wikipedia.org\/wiki\/Computing\">computing<\/a>, <strong>symmetric multiprocessing<\/strong> (SMP) involves a <a title=\"Multiprocessor\" href=\"http:\/\/en.wikipedia.org\/wiki\/Multiprocessor\">multiprocessor<\/a> computer hardware architecture where two or more identical processors are connected to a single shared <a class=\"mw-redirect\" title=\"Main memory\" href=\"http:\/\/en.wikipedia.org\/wiki\/Main_memory\">main memory<\/a> and are controlled by a single OS instance. Most common multiprocessor systems today use an SMP architecture. In the case of <a class=\"mw-redirect\" title=\"Multi-core (computing)\" href=\"http:\/\/en.wikipedia.org\/wiki\/Multi-core_%28computing%29\">multi-core<\/a> processors, the SMP architecture applies to the cores, treating them as separate processors. Processors may be interconnected using buses, <a title=\"Crossbar switch\" href=\"http:\/\/en.wikipedia.org\/wiki\/Crossbar_switch\">crossbar switches<\/a> or on-chip mesh networks. The bottleneck in the scalability of SMP using buses or crossbar switches is the bandwidth and power consumption of the interconnect among the various processors, the memory, and the disk arrays. Mesh architectures avoid these bottlenecks, and provide nearly linear scalability to much higher processor counts at the sacrifice of programmability:<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Symmetric multiprocessing &#8211; Wikipedia, the free encyclopedia. In computing, symmetric multiprocessing (SMP) involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are controlled by a single OS instance. &hellip; <a href=\"http:\/\/bucktownbell.com\/?p=1652\">Continue reading <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[17],"tags":[114,261,155],"class_list":["post-1652","post","type-post","status-publish","format-standard","hentry","category-technical","tag-computer-architecture","tag-definition","tag-wiki"],"_links":{"self":[{"href":"http:\/\/bucktownbell.com\/index.php?rest_route=\/wp\/v2\/posts\/1652","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/bucktownbell.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/bucktownbell.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/bucktownbell.com\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"http:\/\/bucktownbell.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1652"}],"version-history":[{"count":2,"href":"http:\/\/bucktownbell.com\/index.php?rest_route=\/wp\/v2\/posts\/1652\/revisions"}],"predecessor-version":[{"id":1654,"href":"http:\/\/bucktownbell.com\/index.php?rest_route=\/wp\/v2\/posts\/1652\/revisions\/1654"}],"wp:attachment":[{"href":"http:\/\/bucktownbell.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1652"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/bucktownbell.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1652"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/bucktownbell.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1652"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}